Seiko Epson to Collaborate with Lapidus to Establish R&D Functions for Semiconductor Back-End Processes at Epson's Chitose
🟦 Epson and Rapidus collaborate to develop next-generation semiconductors! Establishment of an R&D base at the Chitose Plant
Seiko Epson is in discussions to establish part of Rapidus’ R&D functions related to semiconductor back-end processes at the Chitose Plant. Epson’s Chitose plant manufactures small LCD panels, which are key components for projectors. Lapidus plans to design and develop chiplet packaging technology for 2nm generation semiconductors in the space leased or used. The two companies expect to sign the agreement by early May.
🟦 Contributing to the establishment of next-generation semiconductor design and manufacturing in Japan
Semiconductor manufacturing is divided into front-end and back-end processes. The front-end process is the process of forming a circuit on a silicon wafer. The post-process is the process of inspecting and packaging the formed circuit.
With the support of the Japan government, Lapidus is constructing a front-end processing plant for 2nm generation semiconductors in Chitose. Through this project, Epson hopes to contribute to the establishment of the design and manufacture of next-generation semiconductors in Japan. Epson’s Chitose Plant is located next to the semiconductor factory that Lapidus is constructing, making it an ideal location for an R&D base.
🟦Summary
Seiko Epson announced that it is collaborating with Lapidus to establish an R&D function related to semiconductor back-end processing at Epson’s Chitose Plant. In recent years, it is expected to contribute to the establishment of the design and manufacture of back-end processes, which have become increasingly important due to the increase in demand for AI semiconductors.
Since the Epson and Lapidus factories are located next to each other, the collaboration seems to go very smoothly.
