TSMC announced that it will take approximately 18 months for AI chip supply constraints to be resolved.
🟦TSMC’s AI chip supply constraints continue
TSMC announced that it will take about 18 months for AI semiconductor supply constraints to be eased. AI semiconductor supply constraints are not due to the shortage of supply of semiconductor chips (front-end processes) themselves, but to the production capacity of advanced packaging in the back-end process.
TSMC manufactures its own advanced packaging technology called CoWoS (Chip on Wafer on Substrate). This technology is used in Nvidia’s A100 and H100 AI processors, which are used for high-speed data transmission and training of large-scale language models.
🟦 Is “Moore’s Law” the limit?
Moore’s Law, which states that the number of transistors integrated in semiconductors doubles every two years, is said to have reached its limit. Therefore, semiconductor companies are focusing on developing advanced packaging technologies to improve performance and efficiency. Semiconductor packaging is a post-process technology in which wafers that have been processed are cut into chips and packaged.
Both Intel and TSMC have been accelerating their investments in advanced packages in recent years. Intel accounts for 32% and TSMC 27%, accounting for 2% of the world’s capital investment for advanced packages. To meet the growing demand for AI, TSMC announced plans to build a $60.29 billion (¥4200 billion) advanced chip packaging facility in Miaoli County, Taiwan.
TSMC announced that it will take about 18 months before AI chip supply constraints are resolved. Supply constraints are not due to a shortage of AI chips, but to the production capacity of advanced packaging.
Japan is said to be an advanced country with advanced packages, but the scale of investment is very different compared to companies around the world such as TSMC and Intel. As in the previous process, it may be necessary to devise ways to prevent it from collapsing from developed countries before you know it.